Mauricio Banaszeski Da Silva

Produção Bibliográfica

    2022 (Total: 1)
  • doi ISSN Random Telegraph Noise Modeling for Circuit Analysis: RTN in Ring Oscillators (IEEE Journal of the Electron Devices Society)
    2019 (Total: 1)
  • doi ISSN A Compact Statistical Model for the Low-Frequency Noise in Halo-Implanted MOSFETs: Large RTN Induced by Halo Implants (IEEE TRANSACTIONS ON ELECTRON DEVICES)
    2017 (Total: 2)
  • doi ISSN A Compact Model for the Statistics of the Low-Frequency Noise of MOSFETs With Laterally Uniform Doping (IEEE TRANSACTIONS ON ELECTRON DEVICES)
  • doi ISSN Autocorrelation Analysis as a Technique to Study Physical Mechanisms of MOSFET Low-Frequency Noise (IEEE TRANSACTIONS ON ELECTRON DEVICES)
    2016 (Total: 1)
  • doi ISSN A Physics-Based Statistical RTN Model for the Low Frequency Noise in MOSFETs (IEEE TRANSACTIONS ON ELECTRON DEVICES)
    2023 (Total: 1)
  • doi ISSN Random Telegraph Noise in Analog CMOS Circuits (IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS)
    2020 (Total: 1)
  • doi An Overview on Statistical Modeling of Random Telegraph Noise in the Frequency Domain (Noise in Nanoscale Semiconductor Devices)
    2021 (Total: 2)
  • doi Towards Unifying the Statistical Modeling of Charge Trapping in Time and Frequency Domain (2021 IEEE Latin America Electron Devices Conference (LAEDC))
  • doi Unified Compact Modeling of Charge Trapping in 1/f Noise, RTN and BTI (2021 5th IEEE Electron Devices Technology & Manufacturing Conference (EDTM))
    2017 (Total: 1)
  • Variability-based Analysis Technique Revealing Physical Mechanisms of MOSFET Low-frequency Noise (International Conference on Microelectronic Test Structures. 2017 (ICMTS))
    2014 (Total: 1)
  • doi A physics-based RTN variability model for MOSFETs (2014 IEEE International Electron Devices Meeting (IEDM))
    2011 (Total: 1)
  • doi On-chip circuit for massively parallel BTI characterization (2011 IEEE International Integrated Reliability Workshop (IIRW))
    2010 (Total: 1)
  • doi Modeling the impact of RTS on the reliability of ring oscillators (Symposium on Integrated Circuits and System Design)
    2009 (Total: 1)
  • doi NBTI-aware technique for transistor sizing of high-performance CMOS gates (LATW 2009)
    2008 (Total: 2)
  • Modeling the Impact of NBTI on the Reliability of Arithmetic Circuits (8th Microelectronics Students Forum - Chip in the Pampa)
  • Numerical Method for Modeling Process Variations and NBTI. In: IEEE Insternational Conference on Very Large Scale Integration (VLSI-SOC 2008)
    2008 (Total: 2)
  • MÉTODO NUMÉRICO PARA A MODELAGEM DE VARIAÇÕES DE PROCESSO E NBTI (XX Salão de Iniciação Científica)
  • O IMPACTO DO NBTI NA CONFIABILIDADE DE CIRCUITOS ARITMÉTICOS (XX Salão de Iniciação Científica)

Produção Técnica

    2023 (Total: 2)
  • Revisor de periódico 'IET Circuits Devices & Systems'
  • Revisor de periódico 'MICROELECTRONIC ENGINEERING'
    2022 (Total: 2)
  • Revisor de periódico 'IET Circuits Devices & Systems'
  • Revisor de periódico 'MICROELECTRONIC ENGINEERING'
    2021 (Total: 2)
  • Revisor de periódico 'IET Circuits Devices & Systems'
  • Revisor de periódico 'MICROELECTRONIC ENGINEERING'
    2020 (Total: 2)
  • Revisor de periódico 'IET Circuits Devices & Systems'
  • Revisor de periódico 'MICROELECTRONIC ENGINEERING'
    2019 (Total: 2)
  • Revisor de periódico 'IET Circuits Devices & Systems'
  • Revisor de periódico 'MICROELECTRONIC ENGINEERING'
    2018 (Total: 2)
  • Revisor de periódico 'IET Circuits Devices & Systems'
  • Revisor de periódico 'MICROELECTRONIC ENGINEERING'
    2017 (Total: 1)
  • Revisor de periódico 'MICROELECTRONIC ENGINEERING'

Produção Artística

Não informado

Orientações Concluídas

Não informado